TY - GEN
T1 - A 4-Channel 0.23mm2 Voltage-to-Time Converter AFE with 3.7μ Vrms Noise and 480nW Galvanic Impulse Uplink
AU - Bandali, Mehdi
AU - Riley, Morgan
AU - Johnson, Benjamin C.
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024
Y1 - 2024
N2 - We present a 4-channel 15 kS/s Voltage-to-Time Converter (VTC) analog front-end (AFE) with a 0.49μW impulse-based galvanic uplink for a peripheral nerve interface. Multiple, low-noise, high-data-rate channels are needed to sense compound action potentials and measure their conduction velocity as they propagate down a peripheral nerve. To achieve high energy efficiency for these constraints, the AFE encodes and transmits data with time-domain charge-balanced impulses through an implantable galvanic link. Each channel consists of an integrator with charge-based sampling and amplification for rapid multiplexing. A shared VTC encodes the amplitude-domain outputs of each integrator into differential time-domain impulses. Since the timing can be synchronized with stimulation, this AFE achieves instant artifact recovery after rail-to-rail stimulation events. We designed this AFE in a 180nm CMOS process, and the simulation results show an SNDR of 60dB and noise of 3.7μ Vrms. Thanks to the new galvanic uplink protocol, this front-end only consumes 11.28μ W including wireless data transmission for four channels.
AB - We present a 4-channel 15 kS/s Voltage-to-Time Converter (VTC) analog front-end (AFE) with a 0.49μW impulse-based galvanic uplink for a peripheral nerve interface. Multiple, low-noise, high-data-rate channels are needed to sense compound action potentials and measure their conduction velocity as they propagate down a peripheral nerve. To achieve high energy efficiency for these constraints, the AFE encodes and transmits data with time-domain charge-balanced impulses through an implantable galvanic link. Each channel consists of an integrator with charge-based sampling and amplification for rapid multiplexing. A shared VTC encodes the amplitude-domain outputs of each integrator into differential time-domain impulses. Since the timing can be synchronized with stimulation, this AFE achieves instant artifact recovery after rail-to-rail stimulation events. We designed this AFE in a 180nm CMOS process, and the simulation results show an SNDR of 60dB and noise of 3.7μ Vrms. Thanks to the new galvanic uplink protocol, this front-end only consumes 11.28μ W including wireless data transmission for four channels.
KW - Analog front-end (AFE)
KW - Bidirectional neural interfaces
KW - Galvanic interface
KW - Neural recording
KW - Voltage-to-time converter (VTC)
KW - Wireless implant
UR - http://www.scopus.com/inward/record.url?scp=85205002978&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS60917.2024.10658812
DO - 10.1109/MWSCAS60917.2024.10658812
M3 - Conference contribution
AN - SCOPUS:85205002978
T3 - Midwest Symposium on Circuits and Systems
SP - 538
EP - 542
BT - 2024 IEEE 67th International Midwest Symposium on Circuits and Systems, MWSCAS 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 67th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2024
Y2 - 11 August 2024 through 14 August 2024
ER -