A new approach to the design, fabrication, and testing of chalcogenide-based multi-state phase-change nonvolatile memory

H. K. Ande, P. Busa, M. Balasubramanian, K. A. Campbell, R. J. Baker

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

A new approach to developing, fabricating, and testing chalcogenide-based multi-state phase-change nonvolatile memory (NVM) is presented. A test chip is fabricated through the MOSIS service. Then post processing, in the Boise State University lab, is performed on the chip to add the chalcogenide material that forms the NVM. Each memory bit consists of an NMOS access transistor and the chalcogenide material placed between the metal3 of the test chip, connected to the access device, and a common, to all memory bits, electrode. This paper describes the design of the memory bit and of the test structures used for reliability and radiation testing. Fabrication and postprocessing of the memory are also discussed.

Original languageEnglish
Title of host publication2008 IEEE International 51st Midwest Symposium on Circuits and Systems, MWSCAS
Pages570-573
Number of pages4
DOIs
StatePublished - 2008
Event2008 IEEE International 51st Midwest Symposium on Circuits and Systems, MWSCAS - Knoxville, TN, United States
Duration: 10 Aug 200813 Aug 2008

Publication series

NameMidwest Symposium on Circuits and Systems
ISSN (Print)1548-3746

Conference

Conference2008 IEEE International 51st Midwest Symposium on Circuits and Systems, MWSCAS
Country/TerritoryUnited States
CityKnoxville, TN
Period10/08/0813/08/08

Keywords

  • Fabrication
  • Memory reliability
  • Nonvolatile memory
  • PCM test chip
  • Phase change memory (PCM)
  • post-processing

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