A scalable CMOS sensor array for neuronal recording and imaging

Ben Johnson, Shane T. Peace, Thomas A. Cleland, Alyosha Molnar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

We present a CMOS sensor array with 768 low-noise recording sites for neural recording with 2,048 intercalated angle-sensitive pixels (ASP) for optical read-out. The design is highly scalable due to electrode-level digitization with serial data stream-out. The front-end amplifiers use chopping to reduce flicker noise and achieve an input-referred noise of 4.1μV rms over a 4.2kHz bandwidth while occupying an area of only 800μm 2. Digitization is performed by using a distributed ramp ADC that samples every sensor site at 10kHz. Each electrode is plated with platinum to increase the interface capacitance and ensure biocompatibility. The large number of electrodes, 50μm electrode-pitch, and combined optical information will enable sophisticated optogenetic neurophysiological research on a chip.

Original languageEnglish
Title of host publicationIEEE Sensors 2011 Conference, SENSORS 2011
Pages924-928
Number of pages5
DOIs
StatePublished - 2011
Event10th IEEE SENSORS Conference 2011, SENSORS 2011 - Limerick, Ireland
Duration: 28 Oct 201131 Oct 2011

Publication series

NameProceedings of IEEE Sensors

Conference

Conference10th IEEE SENSORS Conference 2011, SENSORS 2011
Country/TerritoryIreland
CityLimerick
Period28/10/1131/10/11

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