Abstract
We have developed a SPICE-like DC model for pentacene thin film transistors by using Verilog-A language. This model is based on an adapted MOSFET model for amorphous silicon TFTs (AIM-SPICE Level 15). A complete parameter extraction procedure has also been established and validated.
| Original language | English |
|---|---|
| Pages (from-to) | 523-526 |
| Number of pages | 4 |
| Journal | Journal of the Korean Physical Society |
| Volume | 54 |
| Issue number | 1 PART 2 |
| DOIs | |
| State | Published - Jan 2009 |
| Externally published | Yes |
Keywords
- Organic thin-film transistors
- Otft modeling
- Parameter extraction
- Verilog-A