TY - GEN
T1 - A Task Graph Set for Evaluation of Reconfigurable Hardware Scheduling Algorithms
AU - Loo, S. M.
AU - Winningham, J. D.
N1 - Publisher Copyright:
Copyright © (2004) by the International Society for Computers and Their Applications. All rights reserved.
PY - 2004
Y1 - 2004
N2 - A task graph set is proposed for the evaluation of reconfigurable environment scheduling algorithms. This makes it possible to evaluate scheduling algorithms under the similar conditions. This paper provides an overview of scheduling in a reconfigurable hardware environment. A method to generate task set is presented. The generated task graph set is then evaluated by three heuristics. These heuristics are based on Random (RA), Simulated Annealing (SA), and Genetic Algorithms (GA). The task graph set is available at http://coen.boisestate.edu/smloo/rsdm/.
AB - A task graph set is proposed for the evaluation of reconfigurable environment scheduling algorithms. This makes it possible to evaluate scheduling algorithms under the similar conditions. This paper provides an overview of scheduling in a reconfigurable hardware environment. A method to generate task set is presented. The generated task graph set is then evaluated by three heuristics. These heuristics are based on Random (RA), Simulated Annealing (SA), and Genetic Algorithms (GA). The task graph set is available at http://coen.boisestate.edu/smloo/rsdm/.
UR - https://www.scopus.com/pages/publications/84883319393
M3 - Conference contribution
AN - SCOPUS:84883319393
T3 - 19th International Conference on Computers and Their Applications 2004, CATA 2004
SP - 159
EP - 163
BT - 19th International Conference on Computers and Their Applications 2004, CATA 2004
A2 - Gupta, Bidyut
T2 - 19th International Conference on Computers and Their Applications, CATA 2004
Y2 - 18 March 2004 through 20 March 2004
ER -