Abstract
In this work we present an architecture for a low power SDR which draws on techniques from both narrowband low power radios and recent work in SDRs. The receiver consists of a wide tuning-range passive mixer, driven with resonant non-overlapping LO drive combined with a noise-power optimized multi-path baseband amplifier. LO generation circuitry drives the mixer with an 8-phase, 12.5% duty cycle LO, but does so directly from complementary LC-tank VCOs in order to resonate out the gate capacitance of the mixer. A capacitor sharing technique on the baseband side of the mixer doubles the RX frequency range of the 8-phase clock at no added cost in power or performance, while achieving a NF as low as 7 dB. The 1.8 mW low noise baseband amplifier reuses the bias current of its four input channels while rejecting the 3rd/5th harmonics by >34 dB. The receiver consumes 10-12 mW (including VCOs, pulse generation and baseband) over a frequency range of 0.7-3.2 GHz with a 1.3 V supply.
Original language | English |
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Pages (from-to) | 1188-1198 |
Number of pages | 11 |
Journal | IEEE Journal of Solid-State Circuits |
Volume | 48 |
Issue number | 5 |
DOIs | |
State | Published - May 2013 |
Keywords
- Harmonic mixing
- Harmonic rejection
- Mixer
- Multi-phase
- Multi-phase clock
- Out-of-band interference
- Passive mixer
- Receiver
- SAW-less
- Software-defined radio (SDR)
- Switching receiver
- Wideband receiver