TY - GEN
T1 - An Artifact-Resilient Neural Recording Front-end with Rail-to-Rail DM and CM Offset Correction
AU - Bandali, Mehdi
AU - Johnson, Benjamin C.
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - We present a small area (0.006mm2) recording front-end for concurrent neural sensing and stimulation with rail-to-rail offset correction. To mitigate crosstalk from volt-level neural stimulation, the low-noise front-end uses an IΣΔ ADC topology with memoryless, charge-based sampling. The front-end uses auto-zeroing to cancel differential and common-mode DC offsets originating from neural electrodes. Since many neural stimulation paradigms have a low-duty cycle but very large amplitudes, we introduce a coordinated timing (CO-T) scheme that dynamically resets the front-end during narrow stimulation pulses. CO-T minimizes samples lost due to stimulation artifacts and enables high-fidelity neural signal reconstruction. We im-plemented the circuit in a 180nm CMOS process and measured a noise density of 74.88nV/√Hz at a sample rate of 15.56kHz and power consumption of 16.95 μW We demonstrate effective cancellation of 1.7Vpp stimulation artifacts and differential and common-mode DC offsets up to 1.2V. To the best of our knowledge, this is the first spike-rate recording system with instant stimulation artifact recovery.
AB - We present a small area (0.006mm2) recording front-end for concurrent neural sensing and stimulation with rail-to-rail offset correction. To mitigate crosstalk from volt-level neural stimulation, the low-noise front-end uses an IΣΔ ADC topology with memoryless, charge-based sampling. The front-end uses auto-zeroing to cancel differential and common-mode DC offsets originating from neural electrodes. Since many neural stimulation paradigms have a low-duty cycle but very large amplitudes, we introduce a coordinated timing (CO-T) scheme that dynamically resets the front-end during narrow stimulation pulses. CO-T minimizes samples lost due to stimulation artifacts and enables high-fidelity neural signal reconstruction. We im-plemented the circuit in a 180nm CMOS process and measured a noise density of 74.88nV/√Hz at a sample rate of 15.56kHz and power consumption of 16.95 μW We demonstrate effective cancellation of 1.7Vpp stimulation artifacts and differential and common-mode DC offsets up to 1.2V. To the best of our knowledge, this is the first spike-rate recording system with instant stimulation artifact recovery.
KW - Closed-loop Neuromodulation
KW - Electrode Offset
KW - Memo-ryless Sampling
KW - Neural Recording
KW - Stimulation Artifact
UR - http://www.scopus.com/inward/record.url?scp=85167694988&partnerID=8YFLogxK
U2 - 10.1109/ISCAS46773.2023.10182181
DO - 10.1109/ISCAS46773.2023.10182181
M3 - Conference contribution
AN - SCOPUS:85167694988
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - ISCAS 2023 - 56th IEEE International Symposium on Circuits and Systems, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 56th IEEE International Symposium on Circuits and Systems, ISCAS 2023
Y2 - 21 May 2023 through 25 May 2023
ER -