Bouncing threads: merging a new execution model into a nanotechnology memory

Sarah E. Frost, Arun F. Rodrigues, Charles A. Giefer, Peter M. Kogge

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

7 Scopus citations

Abstract

The need for small, high speed, low power computers as the end of Moore's law approaches is driving research into nanotechnology. These novel devices have significantly different properties than traditional MOS devices and require new design methodologies, which in turn provide exciting architectural opportunities. The H-memory is a design developed for a particular nanotechnology, quantum-dot cellular automata. We propose a new execution model that merges with the H-memory to exploit the characteristics of this nanotechnology by distributing the functionality of the CPU throughout the memory structure.

Original languageEnglish
Title of host publicationProceedings - IEEE Computer Society Annual Symposium on VLSI
Subtitle of host publicationNew Trends and Technologies for VLSI Systems Design, ISVLSI 2003
EditorsNagarajan Ranganathan, Asim Smailagic
PublisherIEEE Computer Society
Pages19-25
Number of pages7
ISBN (Electronic)0769519040
DOIs
StatePublished - 2003
EventIEEE Computer Society Annual Symposium on VLSI, ISVLSI 2003 - Tampa, United States
Duration: 20 Feb 200321 Feb 2003

Publication series

NameProceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
Volume2003-January
ISSN (Print)2159-3469
ISSN (Electronic)2159-3477

Conference

ConferenceIEEE Computer Society Annual Symposium on VLSI, ISVLSI 2003
Country/TerritoryUnited States
CityTampa
Period20/02/0321/02/03

Keywords

  • Central Processing Unit
  • Electrons
  • Merging
  • Moore's Law
  • MOS devices
  • Nanotechnology
  • Quantum cellular automata
  • Quantum dots
  • Tunneling
  • Yarn

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