TY - JOUR
T1 - Compact Three Phase Multilevel Inverter for Low and Medium Power Photovoltaic Systems
AU - Mondol, Md Halim
AU - Tür, Mehmet Rida
AU - Biswas, Shuvra Prokash
AU - Hosain, Md Kamal
AU - Shuvo, Shuvangkar
AU - Hossain, Eklas
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2020
Y1 - 2020
N2 - A new three phase multilevel inverter with reduced number of components count is proposed in this paper. This inverter is designed using a single DC source per phase to generate multiple level output voltage which makes it suitable for low and medium voltage applications, including ac-coupled renewables or energy storages. A generalized circuit configuration is shown in this paper following which the number of output voltage level can be increased as per expectation. Although, each element endures the voltage stress equivalent to the input DC voltage, the value of total standing voltage (TSV) is reduced by the utilization of minimized number of components with respect to the number of series connected capacitors. Further, staircase modulation scheme is used to generate the switching signals. Hence, the proposed inverter can be operated at low switching frequency with optimal output current harmonic distortion which decreases switching losses and suppresses power factor falling. In order to validate the theoretical explanations and practical performances of the proposed inverter, the hypothesis is simulated for 9, 13 and 39 output voltage level inverters for three phase with a line voltage total harmonic distortion (THD) of 6.06%, 4.16% and 2.10% respectively in MATLAB/Simulink and a 5-level single phase laboratory prototype is implemented in the laboratory.
AB - A new three phase multilevel inverter with reduced number of components count is proposed in this paper. This inverter is designed using a single DC source per phase to generate multiple level output voltage which makes it suitable for low and medium voltage applications, including ac-coupled renewables or energy storages. A generalized circuit configuration is shown in this paper following which the number of output voltage level can be increased as per expectation. Although, each element endures the voltage stress equivalent to the input DC voltage, the value of total standing voltage (TSV) is reduced by the utilization of minimized number of components with respect to the number of series connected capacitors. Further, staircase modulation scheme is used to generate the switching signals. Hence, the proposed inverter can be operated at low switching frequency with optimal output current harmonic distortion which decreases switching losses and suppresses power factor falling. In order to validate the theoretical explanations and practical performances of the proposed inverter, the hypothesis is simulated for 9, 13 and 39 output voltage level inverters for three phase with a line voltage total harmonic distortion (THD) of 6.06%, 4.16% and 2.10% respectively in MATLAB/Simulink and a 5-level single phase laboratory prototype is implemented in the laboratory.
KW - energy storage
KW - multilevel inverters
KW - photovoltaic systems
KW - Pulse width modulation inverters
KW - total harmonic distortion
KW - total standing voltage
UR - http://www.scopus.com/inward/record.url?scp=85083309036&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2020.2983131
DO - 10.1109/ACCESS.2020.2983131
M3 - Article
AN - SCOPUS:85083309036
VL - 8
SP - 60824
EP - 60837
JO - IEEE Access
JF - IEEE Access
M1 - 9046030
ER -
