Cryogenic to Room Temperature Effects of NBTI in High-k PMOS Devices

Richard G. Southwick, Shem T. Purnell, Blake A. Rapp, Ryan J. Thompson, Shane K. Pugmire, Ben Kaczer, Tibor Grasser, William B. Knowlton, Carey M. Rappaport

Research output: Contribution to journalArticlepeer-review

Original languageAmerican English
Journal2011 IEEE International Integrated Reliability Workshop Final Report (IRW)
DOIs
StatePublished - 16 Oct 2011

Keywords

  • current measurement
  • logic gates
  • performance evaluation
  • stress
  • temperature measurement
  • thermal stability

EGS Disciplines

  • Materials Science and Engineering

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