TY - GEN
T1 - Design considerations for an optimized FPGA implementation of space-vector PWM for a two-level inverter
AU - Mohammadi, Danyal
AU - Rafla, Nader
AU - Ahmed-Zaid, Said
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/7/22
Y1 - 2016/7/22
N2 - The design considerations for implementing an optimized fixed-point space-vector pulse-width modulation (SVPWM) for a two-level inverter is presented. Most of the design simulations currently available are specified in floating-point precision to accelerate the process of verifying their functionality. However, area-optimized hardware implementation of these algorithms requires fixed-point precision. A generic function is formulated the precision required for each signal to get the desired precision. A non-convex optimization function is solved for the number of required bit-widths for the signals. This design has been implemented on an FPGA using the obtained solution in order to verify the resulting accuracy. The device utilization summary of this design is also compared to a floating-point precision design.
AB - The design considerations for implementing an optimized fixed-point space-vector pulse-width modulation (SVPWM) for a two-level inverter is presented. Most of the design simulations currently available are specified in floating-point precision to accelerate the process of verifying their functionality. However, area-optimized hardware implementation of these algorithms requires fixed-point precision. A generic function is formulated the precision required for each signal to get the desired precision. A non-convex optimization function is solved for the number of required bit-widths for the signals. This design has been implemented on an FPGA using the obtained solution in order to verify the resulting accuracy. The device utilization summary of this design is also compared to a floating-point precision design.
UR - http://www.scopus.com/inward/record.url?scp=84994234225&partnerID=8YFLogxK
U2 - 10.1109/ITEC.2016.7520291
DO - 10.1109/ITEC.2016.7520291
M3 - Conference contribution
AN - SCOPUS:84994234225
T3 - 2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016
BT - 2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016
Y2 - 27 June 2016 through 29 June 2016
ER -