Design considerations for an optimized FPGA implementation of space-vector PWM for a two-level inverter

Danyal Mohammadi, Nader Rafla, Said Ahmed-Zaid

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The design considerations for implementing an optimized fixed-point space-vector pulse-width modulation (SVPWM) for a two-level inverter is presented. Most of the design simulations currently available are specified in floating-point precision to accelerate the process of verifying their functionality. However, area-optimized hardware implementation of these algorithms requires fixed-point precision. A generic function is formulated the precision required for each signal to get the desired precision. A non-convex optimization function is solved for the number of required bit-widths for the signals. This design has been implemented on an FPGA using the obtained solution in order to verify the resulting accuracy. The device utilization summary of this design is also compared to a floating-point precision design.

Original languageEnglish
Title of host publication2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509004034
DOIs
StatePublished - 22 Jul 2016
Event2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016 - Dearborn, United States
Duration: 27 Jun 201629 Jun 2016

Publication series

Name2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016

Conference

Conference2016 IEEE Transportation Electrification Conference and Expo, ITEC 2016
Country/TerritoryUnited States
CityDearborn
Period27/06/1629/06/16

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