TY - GEN
T1 - Handel-C for rapid prototyping of VLSI coprocessors for real time systems
AU - Loo, S. M.
AU - Wells, B. Earl
AU - Freije, N.
AU - Kulick, J.
N1 - Publisher Copyright:
© 2002 IEEE.
PY - 2002
Y1 - 2002
N2 - The current maturity of modern reconfigurable hardware elements such as field programable gate arrays now makes it possible to utilize application-specific reconfigurable coprocessor logic as part of real time system design. Such logic has great potential to improve both the level of performance and run time determinism of the system. It also gives the real time system designer the capability of performing nonintrusive high-speed monitoring operations such as missed deadline detection and external bus/IO activity analysis that can be directly utilized by the system scheduler to dynamically adapt to changing process load conditions. In most cases, though, designers of real time systems are software development practitioners, not hardware developers. They know much more about traditional software high-level programming languages such as C and C++ than hardware description languages such as VHDL and Verilog. New hardware description languages such as Handel-C are now becoming available to make the hardware design process more accessible to these software developers. In this paper, we investigate the effectiveness of using Handel-C, in an academic setting, to develop real time embedded systems in environments that incorporates reconfigurable FPGA based co-processor logic.
AB - The current maturity of modern reconfigurable hardware elements such as field programable gate arrays now makes it possible to utilize application-specific reconfigurable coprocessor logic as part of real time system design. Such logic has great potential to improve both the level of performance and run time determinism of the system. It also gives the real time system designer the capability of performing nonintrusive high-speed monitoring operations such as missed deadline detection and external bus/IO activity analysis that can be directly utilized by the system scheduler to dynamically adapt to changing process load conditions. In most cases, though, designers of real time systems are software development practitioners, not hardware developers. They know much more about traditional software high-level programming languages such as C and C++ than hardware description languages such as VHDL and Verilog. New hardware description languages such as Handel-C are now becoming available to make the hardware design process more accessible to these software developers. In this paper, we investigate the effectiveness of using Handel-C, in an academic setting, to develop real time embedded systems in environments that incorporates reconfigurable FPGA based co-processor logic.
KW - FPGA
KW - Handel-C
KW - Real time systems
KW - Reconfigurable computing
UR - http://www.scopus.com/inward/record.url?scp=84948695993&partnerID=8YFLogxK
U2 - 10.1109/SSST.2002.1026994
DO - 10.1109/SSST.2002.1026994
M3 - Conference contribution
AN - SCOPUS:84948695993
T3 - Proceedings of the Annual Southeastern Symposium on System Theory
SP - 6
EP - 10
BT - Proceedings of the 34th Southeastern Symposium on System Theory, SSST 2002
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 34th Southeastern Symposium on System Theory, SSST 2002
Y2 - 18 March 2002 through 19 March 2002
ER -