TY - GEN
T1 - Hardware implementation of Multi-Rate input SoftMax activation function
AU - Wasef, Michael
AU - Rafla, Nader
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/8/9
Y1 - 2021/8/9
N2 - The SoftMax activation function is a normalized exponential function that is usually used as an activation function of the last layer of a fully connected neural network. The number of neurons in this layer represents the number of classes. The SoftMax activation function is used to normalize the network outputs to a probability distribution over predicted output classes. In this paper, a multi-rate input SoftMax activation function has been designed and built on FPGA. The unit can read 4 or 2 consecutive inputs or one input, every predefined number of cycles. A ROM design has been utilized to determine the exponential part of the function, while the Coordinate Rotation Digital Computer (CORDIC) reciprocal algorithm has been used to calculate the reciprocal of the sum of the input exponential. Hardware multipliers have been used to calculate the SoftMax output. Unit optimization is achieved by pipelining on the input and output stages. The unit can be configured and controlled by an ARM microcontroller as a complete System-on-Chip (SoC) built on Field Programmable Gate Array (FPGA).
AB - The SoftMax activation function is a normalized exponential function that is usually used as an activation function of the last layer of a fully connected neural network. The number of neurons in this layer represents the number of classes. The SoftMax activation function is used to normalize the network outputs to a probability distribution over predicted output classes. In this paper, a multi-rate input SoftMax activation function has been designed and built on FPGA. The unit can read 4 or 2 consecutive inputs or one input, every predefined number of cycles. A ROM design has been utilized to determine the exponential part of the function, while the Coordinate Rotation Digital Computer (CORDIC) reciprocal algorithm has been used to calculate the reciprocal of the sum of the input exponential. Hardware multipliers have been used to calculate the SoftMax output. Unit optimization is achieved by pipelining on the input and output stages. The unit can be configured and controlled by an ARM microcontroller as a complete System-on-Chip (SoC) built on Field Programmable Gate Array (FPGA).
KW - FPGA
KW - Fully Connected Neural Network (FCNN)
KW - SOC
KW - SoftMax
UR - http://www.scopus.com/inward/record.url?scp=85115645304&partnerID=8YFLogxK
U2 - 10.1109/MWSCAS47672.2021.9531761
DO - 10.1109/MWSCAS47672.2021.9531761
M3 - Conference contribution
AN - SCOPUS:85115645304
T3 - Midwest Symposium on Circuits and Systems
SP - 783
EP - 786
BT - 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021
Y2 - 9 August 2021 through 11 August 2021
ER -