Integrating Through-Wafer Interconnects with Active Devices and Circuits

Jim Jozwiak, Richard G. Southwick, Vaughn N. Johnson, William B. Knowlton, Amy J. Moll

Research output: Contribution to journalArticlepeer-review

17 Scopus citations
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Abstract

Through wafer interconnects (TWIs) enable vertical stacking of integrated circuit chips in a single package. A complete process to fabricate TWIs has been developed and demonstrated using blank test wafers. The next step in integrating this technology into 3D microelectronic packaging is the demonstration of TWIs on wafers with preexisting microcircuitry. The circuitry must be electrically accessible from the backside of the wafer utilizing the TWIs; the electrical performance of the circuitry must be unchanged as a result of the TWI processing; and the processing must be as cost effective as possible. With these three goals in mind, several options for creating TWIs were considered. This paper explores the various processing options and describes in detail, the final process flow that was selected for testing, the accompanying masks that were designed, the actual processing of the wafers, and the electrical test results.

Original languageAmerican English
JournalIEEE Transactions on Advanced Packaging
DOIs
StatePublished - 1 Feb 2008

Keywords

  • integrated circuit interconnections
  • wafer level packaging

EGS Disciplines

  • Electrical and Computer Engineering

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