Interpolation: A first step in teaching rate conversion

The convergence of digital communications and digital signal processing is gaining emphasis in many engineering colleges today. The implementation of these communication systems using both high performance digital signal processors (DSPs) and field programmable gate arrays (FPGAs) is nothing new. In general, these concepts and techniques can be discussed under the umbrella term of software defined radio (SDR). To understand a SDR, one needs to understand rate conversion. While the basics of the rate conversion theory have been well established for decades, the inclusion of these topics at the undergraduate level can be fraught with teaching dangers. If realistic hardware projects and hardware-based demonstrations are to be included as part of a course, the cost factors escalate rapidly. With most commercially available boards costing more than $10,000 apiece, multiple boards to support such a course rapidly become prohibitively expensive. To support our desire to teach these topics at the undergraduate level, we felt it was necessary to develop a low cost DSP board that would allow us to implement the realistic hardware projects and hardware-based demonstrations previously mentioned. This new board interconnects a Texas Instrument (TI) C6711 or C6713 DSP starter kit (DSK) to an Analog Devices (AD) quadrature modulator (AD9857). This modulator is capable of operating at up to 200 million samples per second (MS/s), with a resulting carrier or intermediate frequency of up to 80 MHz (i.e., 40% of the system's sample frequency). An onboard 32-bit direct digital synthesizer (DDS) is used to generate the carrier waveform values. Baseband 14-bit in-phase and quadrature (I/Q) data are presented to the modulator, which can be programmed to interpolate the data at rates of 4x to 252x. The AD9857 is interfaced to the DSK using an Altera Cyclone FPGA. The FPGA provides queuing of the I/Q data, and the logic for control/programming of the modulator. This paper will detail the hardware and software issues associated with this system and briefly describe the classroom utilization of this system in an undergraduate environment.