TY - JOUR
T1 - Leakage Current Recovery in SRAM After AC Stressing
AU - Payan, Cesar
AU - Kumar, Santosh
AU - Thupil, Ajit
AU - Kasichainula, Sridhar
AU - Knowlton, William B.
PY - 2003/1/1
Y1 - 2003/1/1
N2 - A recovery of sub-threshold current, measured as standby current has been seen on Static Random Access Memory (SRAM) devices after AC stress. A theoretical model is presented to explain the observed data in this paper. A trapped charge model is proposed for decrease in subthreshold current leading to lower observed standby current on continuous negative unipolar write stress. Several mechanisms have been proposed earlier such as Poole-Frenkel enhanced emission from traps, trap assisted tunneling, and band-to band tunneling to explain possible source of off current [5,9].
AB - A recovery of sub-threshold current, measured as standby current has been seen on Static Random Access Memory (SRAM) devices after AC stress. A theoretical model is presented to explain the observed data in this paper. A trapped charge model is proposed for decrease in subthreshold current leading to lower observed standby current on continuous negative unipolar write stress. Several mechanisms have been proposed earlier such as Poole-Frenkel enhanced emission from traps, trap assisted tunneling, and band-to band tunneling to explain possible source of off current [5,9].
KW - CMOS process
KW - CMOS technology
KW - current measurement
KW - electron traps
KW - leakage current
KW - random access memory
UR - https://scholarworks.boisestate.edu/electrical_facpubs/298
UR - http://dx.doi.org/10.1109/IRWS.2003.1283303
U2 - 10.1109/IRWS.2003.1283303
DO - 10.1109/IRWS.2003.1283303
M3 - Article
JO - 2003 IEEE International Integrated Reliability Workshop Final Report
JF - 2003 IEEE International Integrated Reliability Workshop Final Report
ER -