TY - GEN
T1 - On-Chip 3D Inductors Using Thru-Wafer Vias
AU - VanAckern, Gary
AU - Baker, R. Jacob
AU - Moll, Amy J.
AU - Saxena, Vishal
PY - 2012
Y1 - 2012
N2 - Three-dimensional (3D) inductors using high aspect ratio (10:1); thru-wafer via (TWV) technology in a complementary metal oxide semiconductor (CMOS) process have been designed, fabricated, and measured. The inductors were designed using 500 μm tall vias, with the number of turns ranging from 1 to 20 in both wide and narrow-trace width-to-space ratios. Radio frequency characterization was studied with emphasis upon de-embedding techniques and the resulting effects. The open, short, thru de-embedding (OSTD) technique was used to measure all devices. The highest quality factor (Q) measured was 11.25 at 798 MHz for a 1-turn device with a self-resonant frequency (f sr) of 4.4 GHz. The largest inductance (L) measured was 45 nH on a 20-turn, wide-trace device with a maximum Q of 4.25 at 732 MHz. A 40% reduction in area is achieved by exploiting the TWV technology when compared to planar devices. This technology shows promising results with further development and optimization.
AB - Three-dimensional (3D) inductors using high aspect ratio (10:1); thru-wafer via (TWV) technology in a complementary metal oxide semiconductor (CMOS) process have been designed, fabricated, and measured. The inductors were designed using 500 μm tall vias, with the number of turns ranging from 1 to 20 in both wide and narrow-trace width-to-space ratios. Radio frequency characterization was studied with emphasis upon de-embedding techniques and the resulting effects. The open, short, thru de-embedding (OSTD) technique was used to measure all devices. The highest quality factor (Q) measured was 11.25 at 798 MHz for a 1-turn device with a self-resonant frequency (f sr) of 4.4 GHz. The largest inductance (L) measured was 45 nH on a 20-turn, wide-trace device with a maximum Q of 4.25 at 732 MHz. A 40% reduction in area is achieved by exploiting the TWV technology when compared to planar devices. This technology shows promising results with further development and optimization.
KW - 3D
KW - Integrated Inductors
KW - Thru-Silicon Vias (TSVs)
KW - Thru-Wafer Vias (TWVs)
UR - https://www.scopus.com/pages/publications/84862907035
UR - https://scholarworks.boisestate.edu/electrical_facpubs/202
U2 - 10.1109/WMED.2012.6202618
DO - 10.1109/WMED.2012.6202618
M3 - Conference contribution
SN - 9781457717369
T3 - IEEE Workshop on Microelectronics and Electron Devices (WMED)
SP - 20
EP - 23
BT - 2012 IEEE Workshop on Microelectronics and Electron Devices, WMED 2012
T2 - 2012 10th IEEE Workshop on Microelectronics and Electron Devices, WMED 2012
Y2 - 20 April 2012 through 20 April 2012
ER -