Abstract
The Bosch etch process1 was utilized to create 50 micrometer vias with an aspect ration of 10:1 in silicon wafers for through wafer interconnects. The process is complex with twenty-two separate parameters required to control the process. Deviating from the standard process and flowing SF6 during the deposition process resulted in a more stable and reproducible process.
Original language | English |
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Pages (from-to) | 338-339 |
Number of pages | 2 |
Journal | Biennial University/Government/Industry Microelectronics Symposium - Proceedings |
State | Published - 2003 |
Event | 15th Biennial University/Government/Industry Microelectronics Symposium - Boise, ID, United States Duration: 30 Jun 2003 → 2 Jul 2003 |