TY - JOUR
T1 - Reconfigurable Threshold Logic Gates Using Memristive Devices
AU - Tran, Thanh
AU - Rothenbuhler, Adrian
AU - Barney Smith, Elisa
AU - Saxena, Vishal
AU - Campbell, Kristy A.
PY - 2012/10/9
Y1 - 2012/10/9
N2 - We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide memristive devices combined with CMOS circuits. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in a Matlab-Simulink/Cadence co-simulation using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices.
AB - We present our early design exploration of reconfigurable Threshold Logic Gates (TLG) implemented using Silver-chalcogenide memristive devices combined with CMOS circuits. A variety of linearly separable logic functions including AND, OR, NAND, NOR have been realized in a Matlab-Simulink/Cadence co-simulation using a single-layer TLG. The functionality can be changed between these operations by reprogramming the resistance of the memristive devices.
KW - memristors
KW - threshold logic circuits
UR - https://scholarworks.boisestate.edu/electrical_facpubs/222
UR - http://dx.doi.org/10.1109/SubVT.2012.6404301
U2 - 10.1109/SubVT.2012.6404301
DO - 10.1109/SubVT.2012.6404301
M3 - Article
JO - 2012 IEEE Subthreshold Microelectronics Conference (SubVT)
JF - 2012 IEEE Subthreshold Microelectronics Conference (SubVT)
ER -